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Intel Core I7: Nehalem Arrives |
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Introduction and Architecture
In 2006 Intel surprised us all with a new microarchitecture called “Core”. It offered such a massive improvement over the dour Pentium 4 that some observers initially doubted Intel’s claim of up to 40% better performance. At the same time Intel announced their intention to accelerate processor development. They promised to go every year one major step forward, either by reducing transistor size or by improving the microarchitecture.

Following this "tick tock" pattern Intel introduced “Penryn” in 2007 with a reduced transistor size of 45nm. Today follows the next step. Intel is introducing a new microarchitecture going by the name “Nehalem”. This is by the way the name of a Native American tribe from Oregon.

The changes we get with Nehalem are similarly radical and as far reaching as the change from Pentium 4 to the “Core” microarchitecture in June 2006. Intel has not only redesigned the microarchitecture but also the system architecture - most importantly the way the processor cores are communicating with each other, the memory subsystem, and peripherals. Nehalem’s most important changes and innovations are:
- Scalable and modular architecture for up to 8 cores per die and multiprocessor support
- Point-to-point quick-path interconnect (QPI) replacing the existing FSB architecture
- On-die memory controller with 3-channel DDR3 support
- Various improvements to the microarchitecture including additional SSE4 instructions
- 3-level memory cache hierarchy.
- New power management and built-in overclocking “Turbo” mode
- Simultaneous multithreading (SMT)
SCALABLE AND MODULAR ARCHITECTURE
Intel is prominently mentioning Nehalem’s “scalable and modular” architecture. Nehalem works with 2, 4 and 8 cores, and can be adapted for mobile, desktop, server and workstation usage including multi processor solutions. We therefore expect a Nehalem based dual processor “Skulltrail” type system in the not too distant future.

The Nehalem core is produced with 45nm technology, same as Penryn, and comes with 731 million transistors. The 4-core Nehalem version that is launching today is a single package, “monolith” 4-core design. Until now Intel’s 4-core solutions were 2 “bolted together” 2-core processors.

Having a closer look at the Nehalem die, the major changes over the existing design are visible at first glance: The on-die memory controller, the massive shared L3 cache, and the new quick path interconnects. The dual and quadcore desktop versions have only 1 QPI enabled, whereas 8-core and multiprocessor versions will feature 2 or more QPI buses.
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